2018 IEEE International Electron Devices Meeting (IEDM 2018)
December 1-5, 2018, San Francisco, United States
The following presentation reported on results of SUPERAID7:
S. Barraud et al., Tunability of Parasitic Channel in Gate-All-Around Stacked Nanosheets
in: Session 21 (Tuesday, December 4, 2:15 pm, Continental Ballroom 5): Process and Manufacturing Technology - Advanced Gate All Around Process
SUPERAID7 is an exibitor at
European Forum for Electronic Components and Systems (EFECS) 2018
November 20-22, 2018, Lisbon, Portugal
SUPERAID7 posters at EFECS 2018
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2018
September 24-26, 2018, Austin, Texas, USA
The scientific program contained 5 presentations from SUPERAID7. The papers are available for download under Publications.
SUPERAID7 Workshop
Process Variations from Equipment Effects to Circuit and Design Impacts
(linked to ESSDERC/ESSCIRC 2018)
September 3, 2018, Dresden, Germany
Material for download
233rd Meeting of the Electrochemical Society (ECS Spring Meeting 2018)
May 13-17, 2018, Seattle, United States
In an invited presentation results from SUPERAID7 were shown:
J. Lorenz, Process Variability for Devices at and beyond the 7 nm Node
2017 IEEE International Electron Devices Meeting (IEDM 2017)
December 2-6, 2017, San Francisco, United States
The following paper reported on results of SUPERAID7:
S. Barraud et al., Performance and Design Considerations for Gate-All-around Stacked-NanoWires FETs
2017 International Conference on Solid State Devices and Materials (SSDM 2017)
September 19-22, 2017, Sendai, Japan
An invited presentation showed results from SUPERAID7:
S. Barraud et al., Stacked-Wires FETs for Advanced CMOS Scaling
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2017
September 7-9, 2017, Kamakura, Japan
Among others, a plenary presentation showed results from SUPERAID7:
J.-C. Barbé et al., Stacked Nanowires/Nanosheets Gate-All-Around MOSFET from Technology to Design Enablement
2016 IEEE International Electron Devices Meeting (IEDM 2016)
December 3-7, 2016, San Francisco, United States
The following papers reported on results from SUPERAID7:
European Nanoelectronics Forum 2016
November 23-24, 2016, Rome, Italy
SUPERAID7 poster at ENF
PATMOS & VARI 2016
International Workshop on Timing Modeling, Organization and Simulation (PATMOS 2016) in conjunction with the European Workshop on CMOS Variability (VARI 2016)
September 21 to 23, 2016, Bremen, Germany
Presentation by J. Lorenz on SUPERAID7
International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) 2016
(organized by Fraunhofer IISB)
September 6-8, 2016, Nuremberg, Germany
In 6 papers at SISPAD 2016, results of SUPERAID7 were shown, please refer to the SUPERAID7 publications list for further information.
The SISPAD 2016 workshops WS1 (Simulation of Advanced Interconnects) and WS3 (Variability-Aware Design Technology Co-Optimization) were organized in cooperation with SUPERAID7.
Further information
Stability Under Process Variability for Advanced Interconnects and Devices Beyond 7 nm Node